Sd Host Controller Driver

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Install JMicron JMB38X SD/MMC Host Controller driver for Windows 10 x64, or download DriverPack Solution software for automatic driver installation and update.

Overview¶

At the 'Ricoh SD Host Controller' window, click 'Next'. At the 'License Agreement' dialog, read the agreement, then, if you agree, click 'I Agree' to continue with the installation. At the 'Finish' screen, click 'Finish'. The installation of the Ricoh SD Host Controller Driver is complete. Hi sorry to bother you hours of searching brought me here. HP have been absolutely useless with helping me on this problem. I notice this is for Device id 0x2382 but mine is Device id 0x2392 which has the same Chip number and Chip description (JMB38X SD/MMC Host Controller) Mine is a bit further down the page but it doesn't have a driver download link just a link to HP for Windows 8 issues. O2Micro OZH24 SD/MMC Host Controller, v.2.0.09, A01. CardReader Driver. To view all drivers for your Vostro 1320, go to Drivers & Downloads. View all drivers.

The SD SPI host driver allows communicating with one or more SD cards by the SPI Master driver which makes use of the SPI host. Each card is accessed through an SD SPI device represented by an sdspi_dev_handle_t spi_handle returned when attaching the device to an SPI bus by calling sdspi_host_init_device. The bus should be already initialized before (by spi_bus_initialize).

This driver’s naming pattern was adopted from the SDMMC Host driver due to their similarity. Likewise, the APIs of both drivers are also very similar.

SD SPI driver (access the SD card in SPI mode) offers lower throughput but makes pin selection more flexible. With the help of the GPIO matrix, an SPI peripheral’s signals can be routed to any ESP32 pin. Otherwise, if SDMMC host driver is used (See SDMMC Host) to access the card in SD 1-bit/4-bit mode, higher throughput can be reached but it requires routing the signals through their dedicated IO_MUX pins only.

With the help of SPI Master driver based on, the SPI bus can be shared among SD cards and other SPI devices. The SPI Master driver will handle exclusive access from different tasks.

The SD SPI driver uses software-controlled CS signal.

How to Use¶

Firstly, use the macro SDSPI_DEVICE_CONFIG_DEFAULT to initialize a structure sdmmc_slot_config_t, which is used to initialize an SD SPI device. This macro will also fill in the default pin mappings, which is same as the pin mappings of SDMMC host driver. Modify the host and pins of the structure to desired value. Then call sdspi_host_init_device to initialize the SD SPI device and attach to its bus.

Then use SDSPI_HOST_DEFAULT macro to initialize a sdmmc_host_t structure, which is used to store the state and configurations of upper layer (SD/SDIO/MMC driver). Modify the slot parameter of the structure to the SD SPI device spi_handle just returned from sdspi_host_init_device. Call sdmmc_card_init with the sdmmc_host_t to probe and initialize the SD card.

Now you can use SD/SDIO/MMC driver functions to access your card!

Other Details¶

Only the following driver’s API functions are normally used by most applications:

Other functions are mostly used by the protocol level SD/SDIO/MMC driver via function pointers in the sdmmc_host_t structure. For more details, see the SD/SDIO/MMC Driver.

Note

SD over SPI does not support speeds above SDMMC_FREQ_DEFAULT due to the limitations of the SPI driver.

API Reference¶

Functions¶

esp_err_tsdspi_host_init(void)

Initialize SD SPI driver.

Note

This function is not thread safe

Return
  • ESP_OK on success

  • other error codes may be returned in future versions

esp_err_tsdspi_host_init_device(constsdspi_device_config_t *dev_config, sdspi_dev_handle_t *out_handle)

Attach and initialize an SD SPI device on the specific SPI bus.

Note

This function is not thread safe

Note

Initialize the SPI bus by spi_bus_initialize() before calling this function.

Note

The SDIO over sdspi needs an extra interrupt line. Call gpio_install_isr_service() before this function.

Return
  • ESP_OK on success

  • ESP_ERR_INVALID_ARG if sdspi_host_init_device has invalid arguments

  • ESP_ERR_NO_MEM if memory can not be allocated

  • other errors from the underlying spi_master and gpio drivers

Parameters
  • dev_config: pointer to device configuration structure

  • out_handle: Output of the handle to the sdspi device.

esp_err_tsdspi_host_remove_device(sdspi_dev_handle_thandle)

Remove an SD SPI device.

Return

Always ESP_OK

Parameters
  • handle: Handle of the SD SPI device

esp_err_tsdspi_host_do_transaction(sdspi_dev_handle_thandle, sdmmc_command_t *cmdinfo)

Send command to the card and get response.

This function returns when command is sent and response is received, or data is transferred, or timeout occurs.

Note

This function is not thread safe w.r.t. init/deinit functions, and bus width/clock speed configuration functions. Multiple tasks can call sdspi_host_do_transaction as long as other sdspi_host_* functions are not called.

Return
  • ESP_OK on success

  • ESP_ERR_TIMEOUT if response or data transfer has timed out

  • ESP_ERR_INVALID_CRC if response or data transfer CRC check has failed

  • ESP_ERR_INVALID_RESPONSE if the card has sent an invalid response

Parameters
  • handle: Handle of the sdspi device

  • cmdinfo: pointer to structure describing command and data to transfer

esp_err_tsdspi_host_set_card_clk(sdspi_dev_handle_thost, uint32_t freq_khz)

Set card clock frequency.

Currently only integer fractions of 40MHz clock can be used. For High Speed cards, 40MHz can be used. For Default Speed cards, 20MHz can be used.

Note

This function is not thread safe

Return
  • ESP_OK on success

  • other error codes may be returned in the future

Parameters
  • host: Handle of the sdspi device

  • freq_khz: card clock frequency, in kHz

esp_err_tsdspi_host_deinit(void)

Sd Host Controller Driver

Release resources allocated using sdspi_host_init.

Note

This function is not thread safe

Return
  • ESP_OK on success

  • ESP_ERR_INVALID_STATE if sdspi_host_init function has not been called

esp_err_tsdspi_host_io_int_enable(sdspi_dev_handle_thandle)

Enable SDIO interrupt.

Return
  • ESP_OK on success

Parameters
  • handle: Handle of the sdspi device

esp_err_tsdspi_host_io_int_wait(sdspi_dev_handle_thandle, TickType_t timeout_ticks)

Wait for SDIO interrupt until timeout.

Return
  • ESP_OK on success

Parameters
  • handle: Handle of the sdspi device

  • timeout_ticks: Ticks to wait before timeout.

esp_err_tsdspi_host_init_slot(int slot, constsdspi_slot_config_t *slot_config)

Initialize SD SPI driver for the specific SPI controller.

Note

This function is not thread safe

Note

The SDIO over sdspi needs an extra interrupt line. Call gpio_install_isr_service() before this function.

Parameters
  • slot: SPI controller to use (HSPI_HOST or VSPI_HOST)

  • slot_config: pointer to slot configuration structure

Return
  • ESP_OK on success

  • ESP_ERR_INVALID_ARG if sdspi_init_slot has invalid arguments

  • ESP_ERR_NO_MEM if memory can not be allocated

  • other errors from the underlying spi_master and gpio drivers

Structures¶

struct sdspi_device_config_t

Extra configuration for SD SPI device.

Public Members

spi_host_device_thost_id

SPI host to use, SPIx_HOST (see spi_types.h).

gpio_num_tgpio_cs

GPIO number of CS signal.

gpio_num_tgpio_cd

GPIO number of card detect signal.

gpio_num_tgpio_wp

GPIO number of write protect signal.

gpio_num_tgpio_int

GPIO number of interrupt line (input) for SDIO card.

struct sdspi_slot_config_t

Extra configuration for SPI host.

Public Members

gpio_num_tgpio_cs

GPIO number of CS signal.

gpio_num_tgpio_cd

GPIO number of card detect signal.

gpio_num_tgpio_wp

GPIO number of write protect signal.

gpio_num_tgpio_int

GPIO number of interrupt line (input) for SDIO card.

gpio_num_tgpio_miso

GPIO number of MISO signal.

gpio_num_tgpio_mosi

GPIO number of MOSI signal.

gpio_num_tgpio_sck

GPIO number of SCK signal.

int dma_channel

DMA channel to be used by SPI driver (1 or 2).

Macros¶

SDSPI_HOST_DEFAULT()

Default sdmmc_host_t structure initializer for SD over SPI driver.

Uses SPI mode and max frequency set to 20MHz

Need for speed shift 2 android free download. ‘slot’ should be set to an sdspi device initialized by sdspi_host_init_device().

SDSPI_SLOT_NO_CD
Intel sd host controller drivers

indicates that card detect line is not used

SDSPI_SLOT_NO_WP

indicates that write protect line is not used

SDSPI_SLOT_NO_INT

indicates that interrupt line is not used

SDSPI_DEVICE_CONFIG_DEFAULT()

Macro defining default configuration of SD SPI device.

SDSPI_SLOT_CONFIG_DEFAULT()

Macro defining default configuration of SPI host

Type Definitions¶

Windows
typedef int sdspi_dev_handle_t

Handle representing an SD SPI device.

General Description

This driver provides the user an easy method for accessing standard Host Controller Interface (HCI) registers and provides some simple functionality on top of the HCI for reading and writing data to an SD card, eMMc card or a SDIO device.

The functions and other declarations used in this driver are in cy_sd_host.h. You can include cy_pdl.h to get access to all functions and declarations in the PDL.

Features:

  • Supports data transfer using CPU, SDMA, ADMA2 and ADMA3 modes
  • Supports a configurable block size (1 to 65,535 Bytes)
  • Supports interrupt enabling and masking
  • Supports SD-HCI Host version 4 mode or less
  • Compliant with the SD 6.0, SDIO 4.10 and eMMC 5.1 specifications and earlier versions
  • SD interface features:
  • - Supports the 4-bit interface
  • - Supports Ultra High Speed (UHS-I) mode
  • - Supports Default Speed (DS), High Speed (HS), SDR12, SDR25 and SDR50 speed modes
  • - Supports SDIO card interrupts in both 1-bit and 4-bit modes
  • - Supports Standard capacity (SDSC), High capacity (SDHC) and Extended capacity (SDXC) memory
  • - Supports CRC and check for command and data packets
  • - Supports packet timeouts
  • - Handles the SDIO card interrupt
  • eMMC interface features:
  • - Supports 1-bit/4-bit/8-bit interfaces
  • - Supports legacy and High Speed SDR speed modes
  • - Supports CRC and check for command and data packets
  • - Supports packet timeouts

Unsupported Features:

  • Wrap address transfers
  • eMMC boot operation
  • Suspend/Resume operation in an SDIO card
  • Operation in SDR104, UHS-II mode, High Speed DDR, HS200, and HS400
  • Serial Peripheral Interface (SPI) protocol mode
  • Interrupt input pins for the embedded SD system
  • Auto-tuning
  • Command queuing

The SD, eMMC, and SDIO cards have the similar physical interface: clock, command line, and data lines. The SD card is removable and requires the SD card connector to connect to the PSoC device. This connector also has the card_mech_write_prot switch for mechanical write protection and the card_detect_n switch for card detection. The eMMC card also has DAT4-DAT7 pins for 8-bit mode and the EMMC_RESET pin.

The driver has a low-level and high-level APIs. The low-level functions provide an easy method to read and write registers. Also, these functions allow valid interaction with an SD Card, eMMC card, and SDIO card. The high-level functions provide an easy mechanism to enumerate a device, read, write, and erase data. They are RTOS-friendly. When starting a command, these functions do not wait until the command completes. The interrupt and flags are used to check when the transfer completes. This allows to put RTOS delays in the user code.

The SD Host driver configuration can be divided to a number of sequential steps listed below:

Note
The SD Host driver is built on top of the SDHC hardware block. The SDHC1 instance is used as an example for all code snippets. Modify the code to match your design.

Enable SD Host

Enable the SDHC block calling Cy_SD_Host_Enable.

Assign and Configure Pins

Only dedicated SD Host pins can be used for SD Host operation. The HSIOM register must be configured to connect the block to the pins. Also, the SD Host pins must be configured in Strong Drive, Input buffer on:

#define SDHC1_PORT1 (P12_0_PORT)
#define SDHC1_CARD_DETECT_N_NUM (P12_1_NUM)
#define SDHC1_CARD_MECH_WRITE_PROT_NUM (P12_2_NUM)
#define SDHC1_CARD_IF_PWR_EN_NUM (P12_6_NUM)
#define SDHC1_CARD_CMD_NUM (P12_4_NUM)
#define SDHC1_CARD_DAT_3TO00_NUM (P13_0_NUM)
#define SDHC1_CARD_DAT_3TO02_NUM (P13_2_NUM)
Cy_GPIO_SetHSIOM(SDHC1_PORT1, SDHC1_IO_VOLT_SEL_NUM, P12_7_SDHC1_IO_VOLT_SEL);
Cy_GPIO_SetHSIOM(SDHC1_PORT1, SDHC1_CARD_DETECT_N_NUM, P12_1_SDHC1_CARD_DETECT_N);
Cy_GPIO_SetHSIOM(SDHC1_PORT1, SDHC1_CARD_MECH_WRITE_PROT_NUM, P12_2_SDHC1_CARD_MECH_WRITE_PROT);
Cy_GPIO_SetHSIOM(SDHC1_PORT1, SDHC1_LED_CTRL_NUM, P12_3_SDHC1_LED_CTRL);
Cy_GPIO_SetHSIOM(SDHC1_PORT1, SDHC1_CARD_IF_PWR_EN_NUM, P12_6_SDHC1_CARD_IF_PWR_EN);
Cy_GPIO_SetHSIOM(SDHC1_PORT1, SDHC1_CARD_EMMC_RESET_N_NUM, P12_0_SDHC1_CARD_EMMC_RESET_N);
Cy_GPIO_SetHSIOM(SDHC1_PORT1, SDHC1_CARD_CMD_NUM, P12_4_SDHC1_CARD_CMD);
Cy_GPIO_SetHSIOM(SDHC1_PORT1, SDHC1_CLK_CARD_NUM, P12_5_SDHC1_CLK_CARD);
Cy_GPIO_SetHSIOM(SDHC1_PORT2, SDHC1_CARD_DAT_3TO00_NUM, P13_0_SDHC1_CARD_DAT_3TO00);
Cy_GPIO_SetHSIOM(SDHC1_PORT2, SDHC1_CARD_DAT_3TO01_NUM, P13_1_SDHC1_CARD_DAT_3TO01);
Cy_GPIO_SetHSIOM(SDHC1_PORT2, SDHC1_CARD_DAT_3TO02_NUM, P13_2_SDHC1_CARD_DAT_3TO02);
Cy_GPIO_SetHSIOM(SDHC1_PORT2, SDHC1_CARD_DAT_3TO03_NUM, P13_3_SDHC1_CARD_DAT_3TO03);
/* Configure pins for SDHC operation */
Cy_GPIO_SetDrivemode(SDHC1_PORT1, SDHC1_IO_VOLT_SEL_NUM, CY_GPIO_DM_STRONG);
Cy_GPIO_SetDrivemode(SDHC1_PORT1, SDHC1_CARD_DETECT_N_NUM, CY_GPIO_DM_STRONG);
Cy_GPIO_SetDrivemode(SDHC1_PORT1, SDHC1_CARD_MECH_WRITE_PROT_NUM, CY_GPIO_DM_STRONG);
Cy_GPIO_SetDrivemode(SDHC1_PORT1, SDHC1_LED_CTRL_NUM, CY_GPIO_DM_STRONG);
Cy_GPIO_SetDrivemode(SDHC1_PORT1, SDHC1_CARD_IF_PWR_EN_NUM, CY_GPIO_DM_STRONG);
Cy_GPIO_SetDrivemode(SDHC1_PORT1, SDHC1_CARD_EMMC_RESET_N_NUM, CY_GPIO_DM_STRONG);
Cy_GPIO_SetDrivemode(SDHC1_PORT1, SDHC1_CARD_CMD_NUM, CY_GPIO_DM_STRONG);
Cy_GPIO_SetDrivemode(SDHC1_PORT1, SDHC1_CLK_CARD_NUM, CY_GPIO_DM_STRONG);
Cy_GPIO_SetDrivemode(SDHC1_PORT2, SDHC1_CARD_DAT_3TO00_NUM, CY_GPIO_DM_STRONG);
Cy_GPIO_SetDrivemode(SDHC1_PORT2, SDHC1_CARD_DAT_3TO01_NUM, CY_GPIO_DM_STRONG);
Cy_GPIO_SetDrivemode(SDHC1_PORT2, SDHC1_CARD_DAT_3TO02_NUM, CY_GPIO_DM_STRONG);

Intel Sd Host Controller Driver Windows 8.1

Cy_GPIO_SetDrivemode(SDHC1_PORT2, SDHC1_CARD_DAT_3TO03_NUM, CY_GPIO_DM_STRONG);

Assign Clock Source

The SD Host is sourced from the CLK_HF clock. The clock must be set to 100 MHz:

/* Note: The CLK_HF2 input clock must be configured and enabled. */
/* Apply the CLK_HF2 divider to have CLK_HF2 = 100 MHz. */
Cy_SysClk_ClkHfSetSource(2u, CY_SYSCLK_CLKHF_IN_CLKPATH0);
Cy_SysClk_ClkHfSetDivider(2u, CY_SYSCLK_CLKHF_NO_DIVIDE);

Configure Interrupt (Optional)

The user can set up the interrupt for SD Host operation. The user is responsible for writing its own Interrupt handler. The Interrupt must be called in the interrupt handler for the selected SDHC instance. Also this interrupt must be enabled in the NVIC otherwise it will not work. It is the user's responsibility to clear the normal and error interrupt statuses. The interrupt statuses can be read using Cy_SD_Host_GetNormalInterruptStatus and Cy_SD_Host_GetErrorInterruptStatus. To clear the interrupt statuses, use Cy_SD_Host_ClearNormalInterruptStatus and Cy_SD_Host_ClearErrorInterruptStatus.

{
uint32_t errorStatus;
normalStatus = Cy_SD_Host_GetNormalInterruptStatus(SDHC1);
/* Check the Error event */
{
Cy_SD_Host_ClearNormalInterruptStatus(SDHC1, normalStatus);
errorStatus = Cy_SD_Host_GetErrorInterruptStatus(SDHC1);
/* Check the Error event */

Intel Sd Host Controller Driver For Windows 7

{
Cy_SD_Host_ClearErrorInterruptStatus(SDHC1, errorStatus);
}
#define SD_Host_INTR_NUM sdhc_1_interrupt_general_IRQn
/* Populate configuration structure (code specific for CM4) */
{
/* .intrSrc */ NvicMux4_IRQn,
#else
/* .intrSrc */ SD_Host_INTR_NUM, /* SD Host interrupt number (non M0 core)*/
/* .intrPriority */ SD_Host_INTR_PRIORITY
/* Generate an interrupt on SD card insertion or removal */
Cy_SD_Host_SetNormalInterruptMask(SDHC1, (CY_SD_HOST_CARD_INSERTION CY_SD_HOST_CARD_REMOVAL));
/* Enable global interrupts. */
/* Hook interrupt service routine and enable interrupt */
(void) Cy_SysInt_Init(&sdHostIntrConfig, &SD_Host_User_Isr);
NVIC_EnableIRQ(NvicMux4_IRQn);
NVIC_EnableIRQ(SD_Host_INTR_NUM);

Configure SD Host

To set up the SD Host driver, provide the configuration parameters in the cy_stc_sd_host_init_config_t structure. Set the emmc parameter to true for the eMMC-device, otherwise set it to false. Set dmaType if DMA mode is used for read/write operations. The other parameters are optional for operation. To initialize the driver, call the Cy_SD_Host_Init function providing a pointer to the filled cy_stc_sd_host_init_config_t structure and allocated cy_stc_sd_host_context_t.

cy_stc_sd_host_context_t sdHostContext;
constcy_stc_sd_host_init_config_t sdHostConfig =
.dmaType = CY_SD_HOST_DMA_ADMA2,
.emmc = false,
(void) Cy_SD_Host_Init(SDHC1, &sdHostConfig, &sdHostContext);

Sd Host Controller Driver Windows 10

The SD, eMMC or SDIO card can be configured using the Cy_SD_Host_InitCard function as a pointer to the filled cy_stc_sd_host_sd_card_config_t structure and allocated cy_stc_sd_host_context_t.

Initialize the card

Finally, enable the card operation calling Cy_SD_Host_InitCard.

uint32_t rca;
cy_stc_sd_host_sd_card_config_t sdCardConfig =
.lowVoltageSignaling = false,
.cardType = &cardType,
.cardCapacity = &cardCapacity,
(void) Cy_SD_Host_InitCard(SDHC1, &sdCardConfig, &sdHostContext);

Intel Sd Host Controller Driver Windows 10

SD card Operation

The master API is divided into two categories: High-Level and Low-Level. Therefore, there are two methods for initiating SD card transactions using either Low-Level or High-Level API.

Use High-Level Functions

Call Cy_SD_Host_Read or Cy_SD_Host_Write to communicate with the SD memory device. These functions do not block in DMA mode and only start a transaction. After a transaction starts, the user should check the further.

eMMC SDIO or Combo Card Operation

Cy_SD_Host_InitCard() initializes all types of cards and automatically detects the card type: SD, SDIO or Combo card. SDIO cards have their input-output (I/O) functions that can be controlled using the GPIO driver. Combo Cards can use both I/O and memory API.

The SD Host does not operate in Hibernate and Deep Sleep modes but it can automatically continue write/read operation after restoring from Deep Sleep mode. SD CLK must be disabled before going to Deep Sleep mode and can be enabled after wake up from Deep Sleep mode. To reduce the power consumption in Active mode, the user can stop the clock of the SD bus but the following interrupts can be allowed: Card Insert, Card Removal and SDIO Interrupt.

SD card removal or insertion can be detected by calling Cy_SD_Host_GetNormalInterruptStatus which returns the card removal or card insertion events (CY_SD_HOST_CARD_REMOVAL or CY_SD_HOST_CARD_INSERTION bits). These events should be reset using Cy_SD_Host_ClearNormalInterruptStatus when they occur. When the card is removed, the SDHC block disables the CMD/DAT output. It is recommended to set DAT pins to the Digital High-Z (CY_GPIO_DM_HIGHZ) drive mode when card removal is detected. This can be doing using the GPIO driver. When the card is inserted, the SDHC block automatically disables the card power and clock. After card insertion, the user should set the DAT pins drive mode back to Strong Drive, Input buffer on (CY_GPIO_DM_STRONG), and then call Cy_SD_Host_InitCard.

Note
If CARD_INTERRUPT is enabled and DAT pins are not set to Digital High-Z drive mode then the interrupt will continuously trigger because the DAT1 line is driven low upon card re-insertion. The user will have to detect the card removal in the ISR handler, apply the power to the card using Cy_SD_Host_EnableCardVoltage, set to the DAT pins drive mode to the Digital High-Z (CY_GPIO_DM_HIGHZ) and clear CY_SD_HOST_CARD_INTERRUPT bit using Cy_SD_Host_ClearNormalInterruptStatus.

When lowVoltageSignaling is true, the SD Host driver sets UHS-I mode during the card initialization. The SD Host driver always starts talking to the card at 3.3V and then later switches to 1.8V. There is no internal regulator in the PSoC 6 to change SD signals from 3.3V to 1.8V. Thus, an external regulator is needed for the VDDIO of the PSoC device to provide the ability to go from 3.3V to 1.8V. The SD Host driver sets the io_volt_sel pin to high which is used to control the external regulator.

Refer to the appropriate device technical reference manual (TRM) for a detailed description of the registers.

MISRA Rule Rule Class (Required/Advisory) Rule Description Description of Deviation(s)
11.4 A A cast should not be performed between a pointer to object type and a different pointer to object type. The function Cy_SD_Host_DeepSleepCallback is the callback of the cy_en_syspm_status_t type. The cast operation safety in these functions becomes the user's responsibility because pointers are initialized when the callback is registered in the SysPm driver.
20.3 R The validity of values passed to library functions shall be checked. This violation is not caused by code changes, i.e. is not a regression.
VersionChangesReason for Change
1.50.1 Minor documentation updates. Documentation enhancement.
1.50 The default value of the SD-clock rump-up time during a wakeup from Deep Sleep is reduced to 1 us, for details, see Cy_SD_Host_DeepSleepCallback description. Optimization for cases of specific wakeup timing requirements.
1.40 Added a possibility to customize the SD-clock rump-up time during a wakeup from Deep Sleep, for details, see Cy_SD_Host_DeepSleepCallback description. Workaround for cases of specific wakeup timing requirements.
1.30 The internal function implementation is changed. Code efficiency enhancement, minor defect fixing.
1.20 Added the Cy_SD_Host_DeepSleepCallback() function. Driver maintenance.
Fixed the Cy_SD_Host_GetCsd() function behaviour. Now the cy_stc_sd_host_context_t::maxSectorNum is being updated correctly Defect fixing.
1.10.1 Documentation of the MISRA rule violation. MISRA compliance.
1.10 The PLL and CLK disable sequence in Cy_SD_Host_DisableSdClk() is changed to disable CLK first.
The Low-Power Support section is updated with additional information about disabling CLK.
The context initialization in Cy_SD_Host_Init() is corrected.
Updated the Write/Read sequence in Cy_SD_Host_Read() and functions for non DMA mode.
Defect fixing.
1.0 The initial version.

API Reference

Macros
Functions
Data Structures
Enumerated Types